%I Status Bit Descriptions
Indicates the ON/OFF state for range comparator outputs 1–8. If the Output Mode =
Preset, the state of the status bit is defined by the ON/OFF presets. If the Output Mode
= Timer, the status bit will be on after each preset point is passed for the length of time
designated by Timer 1 or Timer 2. These bits always indicate the output state for range
comparators 1–8, even if the corresponding hardware output is disabled (and Terminal
Points 9–12 are used as Inputs).
Indicates the ON/OFF state for range comparator outputs 9–16 based solely on the ON
& OFF presets defined for each output.
Indicates the present on/off input status for Inputs 9–12. State changes in these inputs
produce strobe inputs 1–4 according to the configured strobe edge (input 9 = strobe 1,
input 10 = strobe 2, etc.).
Indicates strobe data has been captured by Inputs 9–12, respectively. Once
acknowledged by the PLC ladder program, the corresponding %Q command (Reset
Strobe) should be sent to clear the strobe status for future strobe captures.
strobes will be locked out until this flag is cleared
Indicates the Home marker, after a Home command sequence, has been recognized and
the AQUADB Input Counter has been set to the Home preload value.
This status flag indicates to the PLC that the AQUADB input counter has been preloaded
by the faceplate Preload Input. When acknowledged, this status indication should be
cleared (by the Reset Preload Latch %Q bit) in order to recognize the occurrence of
This latch locks out the effect of the faceplate Preload Input, it will not be
effective again until this flag is cleared. This latch does not
apply to the %Q preload command bit.
This %I bit reports the status of the faceplate Home switch input. When this switch is
closed during the Home cycle, the next encoder marker encountered will preload the
counter with the configured Home value and set the Home Found %I indication. If a
Home Switch is not used, this %I bit can be used as a general purpose PLC input
reporting the status of faceplate Input 5.
These three %I bits indicate the on/off status of Inputs 6, 7, & 8 thus making these inputs
available to the PLC ladder for general purpose control functions.
Indicates the module power-up tests have all passed and the IOP module is ready for
Indicates an error condition has been detected by the IOP and the error code is reported
in the module status code word of the first %AI word. If the error was caused by a bad
data command (such as a %AQ data command), the data has been ignored. Once
acknowledged by the PLC ladder program, the %Q command (Clear error) must be
toggled to clear the error status
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